1. Field of the Invention
The present invention relates to an improved synchronization acquisition apparatus and an implementation a method thereof applicable for wireless communications systems, and more particularly, Code Division Multiple Access (CDMA) wireless telephones or receivers.
2. Background of the Related Art
A Double Dwell, Maximum Likelihood, Serial Sliding Acquisition (DDMLSSA) may be implemented by discrete circuit elements, or a software routine performed by a digital data processor such as a high-speed signal processor, or a combination of the circuit device and the software routine. FIG. 1 shows the DDMLSSA of the related art. The DDMLSSA is a part of a remote communication apparatus receiver such as a Code Division Multiple Access (CDMA) wireless phone in accordance with the mobile telephone station-base station compatibility standard of the TIA/EIA/IS-95(July, 1993), which is the dual mode wide band diffusion spectrum cellular system.
When a wireless telephone is energized, one or more guide channel (i.e., pilot channels) are received from one or more neighboring base stations. Each guide channel transmits a psuedorandom noise (PN) code sequence which differs in phase (e.g., offset of the GPS time) from the PN code sequences of other base stations of the system. The DDMLSSA synchronizes the local PN generator of the receiver to the PN sequence of the guide channel with a signal intensity that exceeds the noise level. While the DDMLSSA need not synchronize to the guide channel of the base station nearest to the receiver at the initial stage, it should synchronize to the guide channel having a sufficiently intense signal strength to initiate communication between the base station and the receiver.
A high frequency receiver 1 and a frequency demodulator 2 receive a PN code signal from the guide channel of more than one transmission base station BS. The DDMLSSA is also coupled to a controller such as a data processor 3, which may input an integration time and a predetermined threshold value. The data processor 3 reads the adaptively obtained threshold value, as discussed in further detail below.
The related art DDMLSSA also contains a multiplier 11, first and second integrators 13, 14, a local PN code generator 12, a first, second, third, fourth, fifth, sixth, and seventh comparison block 21, 22, 23, 24, 25, 25, 26, 27, a noise sample count index initialization and incrementing blocks 31, 33, local phase incrementing block 32, and first and second threshold value initialization block 34, 35.
In the related art DDMLSSA, the received PN code signal (including noise) is applied to the multiplier 11. The received PN code signal is then multiplied by the PN code outputted from the local PN generator 12 of the wireless phone. The multiplier 11 output is applied to the first integrator 13 and the second integrator 14. The first integrator 13 is a trial integrator having an integration period of T.sub.D1, seconds, and an output Zi1 of that integrator 13 is transmitted to the first comparator 21.
The first comparator 21 performs an operation to compare the first integrator 13 output Zi1 with a first threshold value (1-y) Z1 at time t. That first threshold value is a function of the maximum first integrator 13 output from past history until time (t-1), and provides a confidence interval greater than 50% for the relatively short correlation length. Initially, the first threshold value Z1 is set to `0`, and y is between 1/16 and 1/8 for the present comparison.
When the first integrator 13 output Zi1 is greater than or equal to the first threshold value (1-y) Z1, the fifth comparator 25 performs a test and updates the first threshold value Z1, as discussed in greater detail below. When the first integrator 13 output Zi1 is less than the first threshold value, the second comparator 22 performs an operation to compare the first integrator 13 output Zi1 with a threshold likelihood value Z1/2, which is less than the historical value of the output of the first integrator 13. The predetermined threshold value is 6 dB less than the maximum signal energy or the maximum likelihood threshold value Z1/2, plus or minus (x), where (x) varies between about 0 and 3 dB.
If the first integrator 13 output Zi1 is greater than or equal to the first threshold likelihood value Z1/2.+-.X based on the test performed by the second comparator 22, the system resets the value of the noise sample count index m to 0 at the index initialization block 31. Next, the third comparator 23 compares the phase i of the locally generated code signal with q, where q is the total number PN phases to be searched in the PN space. Here, q represents the total number of PN chips in the code region and has a value of 2.sub.15, or 32,768 chips.
The third comparator 23 determines whether the signal is at the end portion of the PN code region. If the phase i has a different value from the total number of PN chips q, the phase i is incremented by the local phase incrementing block 32 and the PN code generator 12 is updated, and the interrelationship is checked again. If the locally generated phase i equals the total number of PN chips q in a third comparator 23, the acquisition process is terminated, as an exhaustive search of the PN code region has been conducted, and the correct PN code phase has been determined.
If the first integrator 13 output Zi is less than the first threshold likelihood value Z1/2.+-.X based on the test performed by the second comparator 22, the noise sample count index m is incremented by a value of 1 by the index incrementing block 33. The resulting value of the noise sample index m is then compared with a threshold value M in the fourth comparator 24.
If the noise sample index m is greater than the threshold value M, the checking process of the acquisition process is terminated, as a correct PN code phase determination has been completed, the acquisition apparatus has obtained a proper signal, and a predetermined number of the noise samples has been evaluated. For example, a suitable threshold value M between about 70 and about 150 provides a detection probability that exceeds 90%.
If the noise sample index m is less than or equal to the threshold value M, the phase of the locally generated PN code signal is incremented by the local incrementing block 32, and the interrelationship is checked again. The entire acquisition operation is performed until the first integrator 13 output (1-y)Zi1 exceeds the first threshold value Z1 in the first comparator 21, for the relatively short correlation interval. The output Zi1 of the first integrator 13 is then compared with Z1 by a fifth comparator 25. If the value of the first integrator 13 output Zi1 exceeds the threshold value Z1, the first threshold value is updated to equal the current output value Zi1 of the first integrator 13 in the first threshold value initialization block 34.
If the output Zi1 of the first integrator 13 is smaller than the first threshold value Z1 based on the test performed by the fifth comparison block 25, the first threshold value Z1 is not updated. Since the initial value Z1 is set at `0`, the initial comparison result of the first comparison block 21 is followed by the operation of the fifth comparator 25, and the value of the first threshold value Z1 is initialized to the first integrator 13 output Zi1 by the first threshold value initialization block 34.
Next, the integration (i.e., dwell) time is increased to T.sub.D2 seconds without changing the locally generated PN code phase. The second dwell time provides a higher detection probability and a lower false alarm probability. The integration time of the second integrator 14 is equivalent to about 128 to 2,048 chips, preferably 128 chips (104 msec). The integration time of the second integrator 14 is selected to exceed the integration time of the first integrator 13.
The sixth comparator 26 determines whether the second integrator 14 output Zi2 exceeds the second threshold value Z2. If the second integrator 14 output Zi2 exceeds the second threshold value Z2, then the second threshold value initialization block 35 updates the second threshold value Z2 to equal the current output value Zi2 of the second integrator 14. Since the second threshold value initially equals `0`, the result of the sixth comparison block leads to the operation of the second threshold value initialization block, where the second threshold value Z2 is set to the second integrator 14 output Zi2. Next, the index initialization block 31 sets the noise sample count index m to an initial value of `0`. The phase of the internally generated code signal is varied by the decimal unit of the chip at the local phase incrementing block 32, and the interrelationship is rechecked until the condition in the third comparison block 23 has been satisfied.
If the output Zi2 of the second integrator 14 is less than the second threshold value Z2 as determined by the test performed in the sixth comparison block, the seventh comparison block 27 compares the output value Zi2 of the second integrator 14 with the second threshold likelihood value Z2/2, which is smaller by about 6 dB than the energy level of the maximum signal. If the output value Zi2 of the second integrator 14 is greater than or equal to the second threshold likelihood value Z2/2, the index initialization block 31 resets the noise sample counter index m to equal `0`, and the phase of the PN code signal is varied by the decimal unit of the chip in the local phase incrementing block 32, and the interrelationship is checked again.
If the output Zi2 of the second integrator 14 is less than the second threshold prediction value Z2/2, the index incrementing block 33 increments noise sample counter index m by a value of 1, and the fourth comparator 24 compares the index m with the threshold value M. If the noise sample index m is greater than the threshold value M, the acquisition apparatus terminates the acquisition process as discussed above. If the noise sample counter index m is less than or equal the threshold value M, the entire acquisition process is continuously performed, as described above.
When the acquisition process of the related art is performed in a noisy communication environment, the output of the first integrator 13 fluctuates rapidly. Accordingly, the second integrator 14 is frequently used. However, because the first integrator 13 increasingly discards the false PN phases, the second integrator 13 is used less frequently. Since the second integrator 14 has a longer dwell time, the acquisition time is decreased when the second integrator 14 is used less frequently.
In the index initialization block 31, the noise sample counter index m is set to equal `0`, and the next locally generated PN code phase is set in the local phase incrementing block 32. As a result, once the first locally generated PN code phase of the PN code space has been sampled, the acquisition apparatus automatically self-initializes.
The input PN signal is serially correlated with all possible code positions of the locally generated PN code replica. Whenever the output of the first and second integrators 13,14 exceeds the first and second threshold values, Z1, Z2 a corresponding threshold value is updated. The above-described operation continues until the correlated output satisfies the acquisition process. After the acquisition process terminates, the correct PN alignment is selected as the local PN code phase position, which generates the maximum detection output.
However, as described above, the related art synchronization acquisition apparatus has various disadvantages. Synchronization acquisition speed and reliability are decreased because all the PN code offsets are checked, and there is substantial noise.
The above description of the related art is incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.